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About the role

Principal Design Verification Engineer at Microsoft

Required Skills

verilogvhdlc++pythonsystem veriloguvmfpgasocchip architecture

About the Role

Principal Design Verification Engineer at Microsoft's Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) team, focusing on verifying complex silicon IP/SoC designs for cloud infrastructure. Responsibilities include leading verification efforts, collaborating with cross-functional teams, and innovating methodologies to ensure high-quality hardware delivery.

Key Responsibilities

  • Own or lead verification of complex flows at SOC, subsystem, or IP levels
  • Work closely with cross-functional teams to analyze cost, schedule, and capability trade-offs
  • Collaborate with architecture and design engineers to plan verification and identify test scenarios
  • Develop and maintain verification environments using random-stimulus and coverage-based techniques
  • Innovate and apply new verification methodologies or tools to improve efficiency

Required Skills & Qualifications

Must Have:

  • Doctorate in EE, CE, CS, or related field with 3+ years experience, OR Master's with 6+ years, OR Bachelor's with 8+ years, OR equivalent
  • 7+ years experience in creating simulation environments, developing tests, and debugging for silicon IPs or systems
  • 5+ years industry experience in chip and/or computer architecture
  • 5+ years industry experience in Verilog or VHDL, C/C++, and scripting languages like Python, Ruby, or Perl

Nice to Have:

  • CPU or graphics core verification experience
  • In-depth knowledge of verification principles, testbenches, System Verilog, UVM, and coverage
  • Experience with hardware design for embedded systems or firmware development
  • Experience with hardware emulation or FPGAs, or design experience with synthesizable code

Benefits & Perks

  • Industry leading healthcare